;	[]===========================================================[]
;
;	NOTICE: THIS PROGRAM BELONGS TO AWARD SOFTWARE INTERNATIONAL(R)
;	        INC. IT IS CONSIDERED A TRADE SECRET AND IS NOT TO BE 	
;	        DIVULGED OR USED BY PARTIES WHO HAVE NOT RECEIVED	
;	        WRITTEN AUTHORIZATION FROM THE OWNER.
;
; 	[]===========================================================[]
;

;----------------------------------------------------------------------------
;Rev	Date	 Name	Description
;----------------------------------------------------------------------------
;R44	12/16/98 GAR	Report secondary I/O nodes
;R43	03/13/98 LAW	ifdef PNP_BIOS is always SUPER_IO_PRESENT = 1 
;R42	11/20/97 LAW	added "NO_WIN95_NODE" for some MB
;R41	11/06/97 LAW	added SMC37N769 support
;R40	11/06/97 LAW	rename all superio file use superio.sio
;R39	10/28/97 LAW	added "W83877ATF"
;R38	10/23/97 LAW	added "SMC37C93xPM"
;R37	10/15/97 LAW	added "ITE8681" and "ITE8671"
;R36	10/13/97 LAW	added "NS317" for NS pc97317VLJ
;R35	08/04/97 LAW	added "W83977ATF" and make a W977TF.SIO for 9773 W83977TF
;R34	07/03/97 LAW	Added "NS309" for NS PC87309VLJ
;R33	06/15/97 LAW	Added support SMC37M60x, SMC37M61x
;R32	05/29/97 LAW	Added W83977TF SUPPORT
;R31	05/02/97 LAW	added W9775119.sio (Winbond W83977AF + ALi5119 com4)
;R30	04/26/97 LAW	added "DO_WIN95_REPORT" for S93x8669.sio
;R29	04/17/97 DRS	Added SMC68X.SIO for SMC37C68X
;R28	04/17/97 LAW	Added S93X8669.SIO (SMC37C93X I/O & UMC8669 com3 + com4
;			lpt2)
;R27	04/16/97 LAW	support "NO_DMA_ROUTING_CHIPSET" for ALi152x chipset
;R26	03/20/97 LAW	Added SMC37C93XAPM, SMC37C93XFR
;R25	03/06/97 LAW	Added W83877AF + W83877TF
;R24	03/06/97 LAW	Added SMC67x.SIO for SMC37C67x
;R23	01/21/97 LAW	Added ITE8661.SIO (ITE8661F/ITE8661RF)
;R22	01/24/97 LAW	Added "I8680663" --> ITE8680 + UMC8663
;R21	12/16/96 LAW	Added "SMC37C669FR" "SMC37C67X" "SMC37C68X" "ITE8679"
;			SMC37C669FR --> SMC37C669 + SUPPORT_FAST_IR
;			SMC37C67X  ---> SMC93X
;			SMC37C68X  ---> SMC93X
;			ITE8679    ---> ITE8680
;R20	12/09/96 LAW	Modify superio define
;			ALi513x + ALi5123 -- > ALi513X
;			ALi514x + ALi5123 -- > ALi514X
;			W86967AF + W83977AF -- > W83977AF
;			NS307 + NS308 -- > NS308
;R19	11/14/96 LAW    Added HMC83755.SIO (HMC HM83755 I/O Chipset)
;R18	10/17/96 LAW    Added W967.SIO (W83967AF I/O, RTC, KBC, PS2 mouse)
;R17	09/18/96 LAW    Added NS307.SIO (NS307 I/O, RTC, KBC, PS2 mouse)
;R16	09/11/96 RCH	WIN95 don't pass correct 16bit I/O information while 
;			getting device node, so skip this byte checking if  
;			I/O desciptor is 47H. If check this byte , all devices
;			failed with change resource dynamically
;R15	08/27/96 LAW	Added ITE8680.SIO (ITE 8680 I/O, RTC, KBC, PS2 mouse)
;R14	07/29/96 LAW	Added DUAL669.SIO (SMC_37C669F AND UMC_8669 I/O 
;			Chipset)
;R13	06/26/96 RIC	Added I82091.SIO (Intel 82091AA I/O Chipset)
;R12	06/14/96 KGN	Added SMC932 , Ali5123 Support
;R11	04/24/96 KGN	Added NS 338 I/O.
;R10	04/23/96 AVN	Added SMC93X I/O.
;R09	03/01/96 KGN	Added PRIME 3C I/O Support
;R08	01/19/96 KGN	Added Ali5123 I/O
;R07	11/24/95 AVN	Added SMC92X I/O.
;R06A	11/02/95 RAY	Fix coding error.
;R06	10/26/95 RAY	Support UMC 8669/8665/8665
;			Define UMC_8669 in BIOS.CFG for this
;R05	10/23/95 RAY	Set public to routine: Chk_Set_Which_Cfg
;R04	09/13/95 KEN	Coordinate the offset of PNPDATA with PNPPOST.
;R03	09/07/95 RAY	Save registers in routines: Report_Ecp_Setting &
;						    Prg_Ecp_DMA_Routing 
;R02	09/01/95 RAY	Define input parameters for routine: Chk_Set_Which_Cfg
;			to support common resource
;R01	08/14/95 RAY	Add exteranal definitions: Get_Cmos1, Set_Cmos1
;R00	08/12/95 RAY	For easy debugging:
;			1. Save the old PNPIO.ASM as PNPIO.812
;			2. Individual superio chip related codes will be
;			   moved to a different include files

		PAGE	60,132
		TITLE	PNPIO  -- Plug and Play Super I/O Device Node

; **** NOTES ****
; **** Device node index table structure ****
; byte 0	total number of the device nodes in this table
; byte 1-3	device 0 index structure
;	Byte	attribute flag of device node
;		bit7 = 1	disable (don't report)
;		bit6		reserved
;		bit5		reserved
;		bit4		reserved
;		bit3 = 1	special post procedure support
;		bit2 = 1	special get device node support
;		bit1 = 1	static set device node support
;		bit0 = 1	dynamically set device node support
;	word	offset address point to description block
; byte 4-6	device 1 index structure
; ......
;
; **** Special process table structure (one device) ****
; byte		node number in the above index table
; word		offset address of special get device node procedure
; word		offset address of special set device node procedure
; word		offset address of special post process procedure
;
; CHK_ATTR is for assembler to check corresponding procedure present in
;	NODE_PROC table, if its attribute flag of index table indicate
;	special procedure needed. Avoid coding mistake.

		NEED_SET_DYNM	EQU	00000001b
		NEED_SET_STAT	EQU	00000010b
		NEED_GET_NODE	EQU	00000100b
		NEED_POST_NODE	EQU	00001000b
.386P

.XLIST

;[]========================================================================[]
;
;	Include file definition
;
;[]========================================================================[]

		INCLUDE BIOS.CFG
		INCLUDE COMMON.MAC
		INCLUDE PNP.EQU
.LIST

;[]========================================================================[]
;
;	External label definition
;
;[]========================================================================[]

;[]========================================================================[]
;
;	Low memory init (1st 64k)
;
;[]========================================================================[]

G_RAM		SEGMENT USE16 AT 0

		ORG	04H*4
		INCLUDE SEG_0.INC

		ORG	400H
		INCLUDE G_RAM.INC

;R04		ORG	1000h
		ORG	2000h		;R04
		INCLUDE PNPDATA.INC

		ORG	7C00H
BOOT		LABEL	FAR

G_RAM		ENDS

;[]========================================================================[]
;
;	ONBOARD DEVICE NODES DEFINITION
;
;[]========================================================================[]

IFDEF	PNP_BIOS
SUPER_IO_PRESENT	=	0

ifndef	NO_WIN95_NODE				;R42
;R43SMC_CHIP		=	0
;R43ifdef	SMC37C651
;R43SMC_CHIP		=	1
;R43SUPER_IO_PRESENT	=	1
;R43endif	;SMC37C651
;R43ifdef	SMC37C665
;R43SMC_CHIP		=	1
;R43SUPER_IO_PRESENT	=	1
;R43endif	;SMC37C665
;R43
;R43NS_CHIP 		=	0
;R43ifdef	PC87332
;R43NS_CHIP 		=	1
;R43SUPER_IO_PRESENT	=	1
;R43endif	;PC87332
;R43ifdef	PC87306
;R43NS_CHIP 		=	1
;R43SUPER_IO_PRESENT	=	1
;R43endif	;PC87306
;R43ifdef	PC87336
;R43NS_CHIP 		=	1
;R43SUPER_IO_PRESENT	=	1
;R43endif	;PC87336
;R43
;R43;R20 - start
;R43;------------------
;R43; ALi5123/513x/514x
;R43;------------------
;R43ifdef	ALi513X
;R43ALi5123			EQU	1
;R43endif;	ALi513X
;R43ifdef	ALi514X
;R43ALi5123			EQU	1
;R43endif;	ALi514X
;R43
;R43;------------------
;R43; W83967/977
;R43;------------------
;R43ifdef	W83967AF
;R43W83977AF		EQU	1
;R43endif;	W83967AF
;R43
;R43ifdef	W83977ATF				;R35
;R43W83977AF		EQU	1		;R35
;R43endif;	W83977ATF				;R35
;R43
;R43;R35ifdef	W83977TF			;R32
;R43;R35W83967AF		EQU	1		;R32
;R43;R35endif;	W83977TF			;R32
;R43
;R43;------------------
;R43; NS307/308
;R43;------------------
;R43ifdef	NS308
;R43NS307			EQU	1
;R43endif;	NS308
;R43ifdef	NS317					;R36
;R43NS307			EQU	1		;R36
;R43endif;	NS317					;R36
;R43;R20 - end
;R43
;R43;R21 - start
;R43;------------------
;R43; SMC37C669/669FR
;R43;------------------
;R43ifdef	SMC37C669FR
;R43SMC37C669			EQU	1
;R43endif;	SMC37C669FR
;R43ifdef	SMC37N769				;R41
;R43SMC37C669			EQU	1	;R41
;R43endif;	SMC37N769				;R41
;R43
;R43;R24ifndef	SMC37C93X
;R43;R24ifdef	SMC37C67X
;R43;R24SMC37C93X			EQU	1
;R43;R24endif;	SMC37C67X
;R43;R24endif;	SMC37C93X
;R43
;R43;R29 ifndef	SMC37C93X
;R43;R29 ifdef	SMC37C68X
;R43;R29 SMC37C93X			EQU	1
;R43;R29 endif;	SMC37C68X
;R43;R29 endif;	SMC37C93X
;R43
;R43ifdef	ITE8679
;R43ITE8680				EQU	1
;R43endif;	ITE8679
;R43;R21 - end
;R43ifdef	ITE8681					;R37
;R43ITE8680				EQU	1	;R37
;R43endif;	ITE8681					;R37
;R43ifdef	ITE8671					;R37
;R43ITE8680				EQU	1	;R37
;R43endif;	ITE8671					;R37
;R43
;R43;R23 - start
;R43ifdef	ITE8661RF
;R43ITE8661				EQU	1
;R43endif;	ITE8661RF
;R43;R23 - end
;R43
;R43;R25 - start
;R43ifdef	W83877AF
;R43W83877F				EQU	1
;R43endif;	W83877AF
;R43ifdef	W83877TF
;R43W83877F				EQU	1
;R43endif;	W83877TF
;R43;R25 - end
;R43ifdef	W83877ATF				;R39
;R43W83877F				EQU	1	;R39
;R43endif;	W83877ATF				;R39
;R43
;R43;R26 - start
;R43ifdef	SMC37C93XAPM
;R43SMC37C93X			EQU	1
;R43endif;	SMC37C93XAPM
;R43ifdef	SMC37C93XFR
;R43SMC37C93X			EQU	1
;R43endif;	SMC37C93XFR
;R43;R26 - end
;R43ifdef	SMC37C93XPM				;R38
;R43SMC37C93X			EQU	1	;R38
;R43endif;	SMC37C93XPM				;R38
;R43
;R43ifdef	SMC37M60x				;R33
;R43SMC37C67X			EQU	1	;R33
;R43endif;	SMC37M60x				;R33
;R43ifdef	SMC37M61x				;R33
;R43SMC37C67X			EQU	1	;R33
;R43endif;	SMC37M61x				;R33
;R43ifdef	SMC37B77x
;R43SMC37C67X			EQU	1
;R43endif;	SMC37B77x
;R43
;R43ifdef	W83787F
;R43SUPER_IO_PRESENT	=	1
;R43endif	;W83787F
;R43
;R43ifdef	UMC_8663
;R43SUPER_IO_PRESENT	=	1
;R43endif	;UMC_8663
;R43
;R43ifdef	UMC_8669				;R06
;R43SUPER_IO_PRESENT	=	1		;R06
;R43endif	;UMC_8669				;R06
;R43
;R43ifdef	Ali5119
;R43SUPER_IO_PRESENT	=	1
;R43endif	;Ali5119
;R43
;R43ifdef	Smc37c669
;R43SUPER_IO_PRESENT	=	1
;R43endif	;Smc37c669
;R43
;R43ifdef	W83877F
;R43SUPER_IO_PRESENT	=	1
;R43endif	;W83877F
;R43
;R43ifdef	GS82C803B
;R43SUPER_IO_PRESENT	=	1
;R43endif	;GS82C803B
;R43
;R43ifdef	SMC_ALI
;R43SUPER_IO_PRESENT	=	1
;R43endif	;SMC_ALI
;R43
;R43ifdef	Ali5113
;R43SUPER_IO_PRESENT	=	1
;R43endif	;Ali5113
;R43
;R43IFDEF	SMC_92X				;R07
;R43SUPER_IO_PRESENT	=	1	;R07
;R43ENDIF	;SMC_92X			;R07
;R43
;R43IFDEF	SMC37C93X			;R10
;R43SUPER_IO_PRESENT	=	1	;R10
;R43ENDIF	;SMC37C93X			;R10
;R43
;R43ifdef	SMC37C653
;R43SUPER_IO_PRESENT	=	1
;R43endif	;SMC37C653
;R43
;R43ifdef	W787_877
;R43SUPER_IO_PRESENT	=	1
;R43endif	;W787_877
;R43
;R43IFDEF	Ali5123				;R08
;R43SUPER_IO_PRESENT	=	1	;R08
;R43ENDIF	;Ali5123			;R08
;R43
;R43IFDEF	PRIME3C				;R09
;R43SUPER_IO_PRESENT	=	1	;R09
;R43ENDIF	;PRIME3C			;R09
;R43
;R43IFDEF	NS_338				;R11
;R43SUPER_IO_PRESENT	=	1	;R11
;R43ENDIF	;NS_338				;R11
;R43
;R43IFDEF	S93X_A5123			;R12
;R43SUPER_IO_PRESENT	=	1	;R12
;R43ENDIF	;S93X_A5123			;R12
;R43
;R43IFDEF	I82091				;R13
;R43SUPER_IO_PRESENT	=	1	;R13
;R43endif	;I82091				;R13
;R43
;R43IFDEF	SMC669_N_UMC8669		;R14
;R43SUPER_IO_PRESENT	=	1	;R14
;R43endif	;SMC669_N_UMC8669		;R14
;R43
;R43ifdef	ITE8680				;R15
;R43SUPER_IO_PRESENT	=	1	;R15
;R43endif	;ITE8680			;R15
;R43
;R43ifdef	NS307				;R17
;R43SUPER_IO_PRESENT	=	1	;R17
;R43endif	;NS307				;R17
;R43
;R43ifdef	W83977AF 			;R18
;R43SUPER_IO_PRESENT	=	1	;R18
;R43endif	;W83977AF			;R18
;R43
;R43ifdef	HMC83755 			;R19
;R43SUPER_IO_PRESENT	=	1	;R19
;R43endif	;HMC83755			;R19
;R43
;R43ifdef	I8680663 			;R22
;R43SUPER_IO_PRESENT	=	1	;R22
;R43endif	;I8680663			;R22
;R43
;R43ifdef	ITE8661				;R23
;R43SUPER_IO_PRESENT	=	1	;R23
;R43endif	;ITE8661			;R23
;R43
;R43ifdef	SMC37C67X			;R24
;R43SUPER_IO_PRESENT	=	1	;R24
;R43endif	;SMC37C67X			;R24
;R43
;R43ifdef	SMC37C68X			;R29
;R43SUPER_IO_PRESENT	=	1	;R29
;R43endif	;SMC37C68X			;R29
;R43
;R43ifdef	DO_WIN95_REPORT			;R30
;R43ifdef	S93x8669 			;R28
;R43SUPER_IO_PRESENT	=	1	;R28
;R43endif	;S93x8669			;R28
;R43endif;	DO_WIN95_REPORT			;R30
;R43
;R43ifdef	W83977_N_ALi5119		;R31
;R43SUPER_IO_PRESENT	=	1	;R31
;R43endif;	W83977_N_ALi5119		;R31
;R43
;R43ifdef	NS309				;R34
;R43SUPER_IO_PRESENT	=	1	;R34
;R43endif	;NS309				;R34
;R43
;R43ifdef	W83977TF			;R35
SUPER_IO_PRESENT	=	1	;R35
;R43endif;	W83977TF			;R35
endif;	NO_WIN95_NODE				;R42

ifdef	LPT_IRQ_ROUTING
	extrn	Ct_Get_LPT_IRQ_Routing:near
	extrn	Ct_Set_LPT_IRQ_Routing:near
endif	;LPT_IRQ_ROUTING

	ECP_DMA_ROUTING	= 0
ifdef	ECP_DMA2
	ECP_DMA_ROUTING	= 1
endif	;ECP_DMA2
ifdef	ECP_DMA3
	ECP_DMA_ROUTING	= 1
endif	;ECP_DMA3
IF	ECP_DMA_ROUTING
ifndef	NO_DMA_ROUTING_CHIPSET			;R27
	extrn	Ct_Get_Ecp_DMA_Routing:near
	extrn	Ct_Set_Ecp_DMA_Routing:near
endif;	NO_DMA_ROUTING_CHIPSET			;R27
ENDIF	;ECP_DMA_ROUTING

	extrn	Get_Cmos1:near				;R01
	extrn	Set_Cmos1:near				;R01

endif	;PNP_BIOS

DGROUP		GROUP	FCODE
FCODE		SEGMENT USE16 PARA PUBLIC 'CODE'
		ASSUME	CS:DGROUP,DS:DGROUP

IFDEF	PNP_BIOS

IFE	SUPER_IO_PRESENT

		EVEN
		Public	ONBOARD_NODE_INDEX
ONBOARD_NODE_INDEX	LABEL	BYTE

		DB	0

		Public	ONBOARD_NODE_PROC
ONBOARD_NODE_PROC	LABEL	BYTE
		DB	0FFh

		CHK_ATTR %NODE_NUM

ELSE	;SUPER_IO_PRESENT

ifndef	Report_Secondio_Nodes			;R44
	COMPILE_FOR_PNPIO_ASM	EQU	1

;R40	ifdef	W83787F
;R40		include	W787.SIO
;R40	endif	;W83787F
;R40
;R40	IFDEF	Ali5119
;R40		include	ALI5119.SIO
;R40	endif	;Ali5119
;R40
;R40	IF	NS_CHIP
;R40		include	NS332.SIO
;R40	endif	;NS_CHIP
;R40
;R40	IF	SMC_CHIP
;R40		include	SMC665.SIO
;R40	endif	;SMC_CHIP
;R40
;R40	ifdef	UMC_8663
;R40		include	8663.SIO
;R40	endif	;UMC_8663
;R40
;R40	ifdef	UMC_8669			;R06
;R40		include	8669.SIO		;R06
;R40	endif	;UMC_8669			;R06
;R40
;R40	IFDEF	SMC37C93X
;R40		include	SMC93X.SIO
;R40	endif	;SMC37C93X
;R40
;R40	IFDEF	SMC37C669
;R40		include	SMC669.SIO
;R40	endif	;SMC37C669
;R40
;R40	ifdef	W83877F
;R40		include	W877.SIO
;R40	endif	;W83877F
;R40
;R40	ifdef	GS82C803B
;R40		include	gs803b.SIO
;R40	endif	;GS82C803B
;R40
;R40	ifdef	SMC_ALI
;R40		include	smcali.SIO
;R40	endif	;SMC_ALI
;R40
;R40	IFDEF	Ali5113
;R40		include	ALI5113.SIO
;R40	endif	;Ali5113
;R40
;R40	IFDEF	SMC_92X				;R07
;R40		include	SMC92X.SIO		;R07
;R40	ENDIF	;SMC_92X			;R07
;R40
;R40	IFDEF	SMC37C653
;R40		include	SMC653.SIO
;R40	endif	;SMC37C653
;R40			
;R40	IFDEF	W787_877				
;R40		include	W787_877.SIO		
;R40	ENDIF	;W787_877
;R40			
;R40	IFDEF	Ali5123				;R08
;R40		include	Ali5123.SIO		;R08
;R40	ENDIF	;Ali5123			;R08
;R40			
;R40	IFDEF	PRIME3C				;R09
;R40		include	PRIME3C.SIO		;R09
;R40	endif	;PRIME3C			;R09
;R40
;R40	IFDEF	NS_338				;R11
;R40		include	NS338.SIO		;R11
;R40	endif	;NS_338				;R11
;R40
;R40	IFDEF	S93X_A5123			;R12
;R40		include	S93X5123.sio		;R12
;R40	ENDIF	;S93X_A5123			;R12
;R40
;R40	IFDEF	I82091				;R13
;R40		include	I82091.SIO		;R13
;R40	endif	;I82091				;R13
;R40
;R40	IFDEF	SMC669_N_UMC8669		;R14
;R40		INCLUDE DUAL669.SIO		;R14
;R40	endif	;SMC669_N_UMC8669		;R14
;R40
;R40	ifdef	ITE8680				;R15
;R40		include ITE8680.SIO		;R15
;R40	endif	;ITE8680			;R15
;R40
;R40	ifdef	NS307				;R17
;R40		include NS307.SIO		;R17
;R40	endif	;NS307				;R17
;R40
;R40	ifdef	W83967AF 			;R18
;R40		include W967.SIO		;R18
;R40	endif	;W83967AF			;R18
;R40
;R40	ifdef	HMC83755 			;R19
;R40		include HMC83755.SIO		;R19
;R40	endif	;HMC83755			;R19
;R40
;R40	ifdef	I8680663			;R22
;R40		include I8680663.SIO		;R22
;R40	endif	;I8680663			;R22
;R40
;R40	ifdef	ITE8661				;R23
;R40		include ITE8661.SIO		;R23
;R40	endif	;ITE8661			;R23
;R40
;R40	ifdef	SMC37C67X			;R24
;R40		include	SMC67X.SIO		;R24
;R40	endif	;SMC37C67X			;R24
;R40
;R40	ifdef	SMC37C68X			;R29
;R40		include	SMC68X.SIO		;R29
;R40	endif	;SMC37C68X			;R29
;R40
;R40	ifdef	DO_WIN95_REPORT			;R30
;R40	ifdef	S93x8669			;R28
;R40		include S93x8669.SIO		;R28
;R40	endif	;S93x8669			;R28
;R40	endif;	DO_WIN95_REPORT			;R30
;R40
;R40	ifdef	W83977_N_ALi5119		;R31
;R40		include W9775119.sio		;R31
;R40	endif;	W83977_N_ALi5119		;R31
;R40
;R40	ifdef	NS309				;R34
;R40		include NS309.SIO		;R34
;R40	endif	;NS309				;R34
;R40
;R40	ifdef	W83977TF			;R35
;R40		include W977TF.SIO		;R35
;R40	endif;	W83977TF			;R35
		include Superio.SIO		;R40
;R44 - start
else	;Report_Secondio_Nodes
	COMPILE_FOR_PNPIO_ASM	=	0
		include Superio.SIO
		include Secondio.SIO

		Public	ONBOARD_NODE
ONBOARD_NODE	LABEL	BYTE
	COMPILE_FOR_PNPIO_ASM	=	1
		include Superio.NOD
		include Secondio.NOD

		EVEN
		Public	ONBOARD_NODE_INDEX
ONBOARD_NODE_INDEX	LABEL	BYTE
	DB	ONBOARD_NODES_NUM
	COMPILE_FOR_PNPIO_ASM	=	2
		include Superio.NOD
		include Secondio.NOD
ONBOARD_NODES_NUM	EQU	($ - ONBOARD_NODE_INDEX - 1)/3

		Public	ONBOARD_NODE_PROC
ONBOARD_NODE_PROC	LABEL	BYTE
	COMPILE_FOR_PNPIO_ASM	=	3
		include Superio.NOD		
		include Secondio.NOD
		DB	0FFh
		CHK_ATTR %NODE_NUM

	COMPILE_FOR_PNPIO_ASM	=	4
		include Superio.NOD		
		include Secondio.NOD
endif	;Report_Secondio_Nodes			
;R44 - end

ENDIF	;SUPER_IO_PRESENT	;R05 

;[]=======================================================================[]
;Input	:	ES = DevNode Buffer SEGMENT
;		DI = DevNode Buffer OFFSET
;
;		SI = DevNode table OFFSET
;
;		CX = length of each possible resource
;		BH = how many possible resource to scan
;
;
;		DX = Length of common resource			;R02
;
;Output :	if (BH = -1)
;		   set to disable
;		else if (NC)
;		    Possible resource is found
;		    BL = which possible resource (starting from 0)
;		else if (CF)
;		    No possible resource is found
;[]=======================================================================[]
		Public	Chk_Set_Which_Cfg	;R05
Chk_Set_Which_Cfg	Proc	Near

		push	di				;R06

		mov	ax, cs
		mov	ds, ax				;DS:SI

		add	di, 12
		add	si, 12

		push	cx					;R02
		add	cx, dx					;R02
		call	Rep_Cmp 	;set to disabled ?
		pop	cx					;R02
		jne	short @F	;no !
		mov	bl, bh					;R02
		mov	bh, -1		;indicates set to disable
		pop	di	 				;R06A
		ret
	@@:
		add	si, 2		;Skip 1st END_DSP
		add	si, dx					;R02
		add	di, dx					;R02
		mov	bl, -1

	Next_Possible_Resource:

		inc	bl
		inc	si		;Skip START_DF
		call	Rep_Cmp
		je	short Possible_Resource_Found
		dec	bh
		jnz	short Next_Possible_Resource

		stc

	Possible_Resource_Found:

		pop	di				;R06

		ret

	Rep_Cmp:

		pusha
		cld
;R16		repe	cmpsb
;R16 - start
;WIN95 don't pass correct I/O information to get device node, so skip this 
;byte checking if the I/O desciptor is 47H
Chk_ByteNext:
		mov	al,[si]
		cmp	es:[di],al
		jne	short Bad_DevNode

		cmp	al,47H			;Is IO_DSP ?
		jne	short Not_IODsp		;no, normal comparing

		inc	si			;skip IO information
		inc	di
		dec	cx
		jz	short Bad_DevNode	;finish ?

Not_IODsp:
		inc	si			;next byte to compare
		inc	di			;next byte to compare

		dec	cx
		jnz	short Chk_ByteNext
Bad_DevNode:
;R16 - end
		popa
		pushf
		add	si, cx		;allocated resource length
		popf
		clc

Dummy_Set_Node:
		clc
		ret

Chk_Set_Which_Cfg	Endp

;R02 - starts
IF	ECP_DMA_ROUTING

		Public	Report_Ecp_Setting
Report_Ecp_Setting	Proc	Near

ifndef	NO_DMA_ROUTING_CHIPSET			;R27
		pusha					;R03
		mov	byte ptr es:[di+12], 2Ah
		call	Ct_Get_Ecp_DMA_Routing
		mov	cl, al
		mov	al, 1
		shl	al, cl
		mov	byte ptr es:[di+12+1], al
		popa					;R03
else;	NO_DMA_ROUTING_CHIPSET			;R27
		mov	byte ptr es:[di+12+1], 00001000b;R27
endif;	NO_DMA_ROUTING_CHIPSET			;R27
		add	di, 3

		ret

Report_Ecp_Setting	Endp

		Public	Prg_Ecp_DMA_Routing
Prg_Ecp_DMA_Routing	Proc	Near

ifndef	NO_DMA_ROUTING_CHIPSET			;R27
		pusha					;R03

		mov	ah, es:[di+12+1]

		mov	al, ECP_DMA1
		cmp	ah, (1 shl ECP_DMA1)
		je	short SetEcpDma

	ifdef	ECP_DMA2
		mov	al, ECP_DMA2
		cmp	ah, (1 shl ECP_DMA2)
		je	short SetEcpDma
	endif	;ECP_DMA2

	ifdef	ECP_DMA3
		mov	al, ECP_DMA3
		cmp	ah, (1 shl ECP_DMA3)
		je	short SetEcpDma
	endif	;ECP_DMA3

		mov	al, -1
		cmp	bh, -1
		je	short SetEcpDma

		stc
		jmp	short @F

	SetEcpDma:

;R03		push	bx
		call	Ct_Set_Ecp_DMA_Routing
;R03		pop	bx

		clc
	@@:
		popa					;R03

endif;	NO_DMA_ROUTING_CHIPSET			;R27
		ret

Prg_Ecp_DMA_Routing	Endp

ENDIF	;ECP_DMA_ROUTING
;R02 - ends

;R05 ENDIF	;SUPER_IO_PRESENT

		Public	Rep_Movsb
Rep_Movsb	Proc	Near

		inc	si
		mov	ax, cs
		mov	ds, ax
		add	di, 12
		cld
		rep	movsb
		ret

Rep_Movsb	Endp

ENDIF	;PNP_BIOS

FCODE		ENDS
		END